1. Field of the Invention
This invention relates generally to testing systems of integrated circuits and in particular to transmission line pulse systems and devices.
2. Description of the Related Art
Measurement of integrated circuit (IC) short pulse response is often made using Transmission Line Pulse (TLP) techniques as described in the ESD Association industry document ANSI/ESD SP5.5.1-2004 and U.S. Pat. No. 5,519,327. These documents describe the technique for measuring the response of a device under test (DUT) when pulses are coupled to the DUT. The technique comprises comparing the pulse that is received at the DUT with the reflected pulse from the DUT. The relative amplitudes of these pulses are controlled by the dynamic impedance of the DUT. Studies of DUT responses to short, high power pulses is a common goal of electrostatic discharge (ESD) studies.
In a TLP device, pulses are carried in a constant impedance cable between the pulse generator and the DUT to avoid pulse distortions. It is common to measure the current and voltage pulse waveforms in the cable connected to the DUT. Since these measurements are not exactly made at the DUT, some error is introduced by the interconnecting cable. ESDA/ANSI STM 5.5-HBM prescribes that such measurement distortions are to be measured using open circuit and short circuit test loads to enable the raw data to be corrected for these systemic errors.
The prior art method of TLP corrections is described in section 7 of the ESD Assoc. ANSI/ESD SP5.5.1 document. This document defines procedures including:
7 Test Requirements and Procedures
7.1 Error Correction
Adjustments of both current and voltage measurements are important to remove unavoidable non-ideal system characteristics such as system resistance, contact resistances, and shunt resistance. Periodic verification using simple components with known properties insures accurate measurements.
7.2 Tester Error Correction Methodology
Perform the error correction methodology, including the open and short circuit measurements, at least once per shift or when the equipment is modified or changed. Longer periods between error correction steps may be used if no changes in the error correction factors are observed for several consecutive checks. Create a separate set of adjustment values for each test pulse rise time, or configuration of cables and probes used to collect device data. The adjustments derived from the short circuit and open circuit measurements may be applied to the data within the operating system software, during post processing using spreadsheet or other data analysis software or can be done manually. To insure accurate results, all measurements should be performed on properly calibrated measurement instruments.
7.2.1 Error Correction Short Circuit Methodology
Measurements through a short circuit allow for correction of system and contact resistance.
7.2.1.1 Connect an electrical short circuit to the end of the device testing connections or needles at the DUT. In the case of wafer probes, placing probe needles on a low resistance clean metal can be considered as a good electrical short circuit. The short circuit should be made of the same type of material to be used during device measurements or verification, and should be verified by standard low resistance measurement techniques with accuracy to 1 m Ω.
7.2.1.2 Perform a TLP test (see section 7.4 for test procedure) with at least 5 points set to the maximum current. If the slope of a line through the test points is not 0 Ω, then the value of the slope of the line in V/A (Ω) represents the internal adjustment value and should be used to correct the DUT I-V test data.
7.2.1.3 Record the measured V/A values for reference and use until the next short circuit error correction.
7.2.1.4 For the greatest accuracy, use an I-V plot range of +/−1V with the current range set to highest value used in the TLP system.
7.2.2 Error Correction Open Circuit Methodology
Measurements through an open circuit allow the correction of shunt resistance contributions.
7.2.2.1 Provide an open circuit at the end of the device testing connections for a socket tester. For wafer probing, disconnecting the probe needles from the short circuit will provide an optimum open circuit.
7.2.2.2 Perform a TLP test (see section 7.4 for test procedure) with at least 5 points set to the maximum voltage. If the slope of a line through the test points is not infinite, then the value of the slope of the line represents the internal adjustment value and should be used to correct the DUT I-V test data.
7.2.2.3 Record the measured A/V values for reference and use until the next open circuit error correction.
7.2.2.4 For the greatest accuracy, use an I-V plot range of +/−10 mA with the voltage range set to the highest value used for device testing.
Note 2: Typically the current probe losses inject 1 ohm into the current carrying wire, thus the total V/A correction will be greater than 1 Ω. VF-TLP test leads running to a wafer probe station can add an additional 1 Ω to the V/A error correction. Therefore, the V/A error correction can be approximately 1 Ω for socket testing and 1 to 2 Ω for wafer testing. Unless a voltage probe with a lower resistance provides greater shunt losses, the A/V error correction will vary in the 10 k Ω to 100 k Ω.
7.3 Tester Verification Methodology
Verification of TLP test system accuracy should be performed on a regular basis and prior to system use to minimize error in the measurements. The verification procedure and methodology is dependent on the TLP method being utilized. Verification is performed using both a Zener diode and a resistor. The Zener diode is used to verify the system voltage error. Once the voltage error is known, a resistor is used to verify the system current error.
7.3.1 Choose a Zener diode. Measure the dc reverse bias breakdown voltage.
7.3.2 Perform a reverse bias TLP test (see section 7.4) on the Zener diode to a voltage above the Zener diode reverse bias breakdown voltage. Compare the VF-TLP and dc breakdown voltage.
7.3.3 Choose a resistor whose resistance value is comparable to the DUT resistance. Typical DUT resistances are between 1 and 50 Ω. Measure the resistance to within 10 mΩ. A four-wire (Kelvin) technique removes contact resistance from the measurement. For a socket system, insert the resistor into the test socket. For a wafer probing system, place the probe needles on the electrical terminals of the resistor element.
7.3.4 Perform a TLP I-V measurement (see section 7.4 for test procedure). The number of voltage steps should be chosen to minimize measurement error relative to the average resistance straight-line slope. Use the V/A and A/V error correction results to correct for system, contact, and shunt resistance.
7.3.5 After the test completion, calculate the V/A ratio (e.g., slope). Compare the calculated resistance and measured dc resistance. The difference is a measure of the amount of error in the TLP measured resistance. Given that the measured voltage has been found to be accurate (e.g., based on the Zener diode measurement), a determination of current measurement accuracy can be obtained by comparing the measured and calculated current. This is based on the measured voltage divided by the known resistance value.
7.3.6 Perform the resistance measurement for each rise time and cable configuration to be used. The accuracy should be approximately the same for each measurement.
The authors of this industry procedure had not studied the interaction of the “open/short correction” and the calibration of the voltage and current measurement components (the inventor is an author of the above procedure). Applying the correction as described will cause a shift in voltage and current calibration. More specifically, when such tests are performed according to prior art techniques, to make a shorted load (a 0 ohm DUT) measure as a short circuit (no DUT voltage) and to make an open load (infinite resistance or 0 siemens conductance) measure as an open circuit (no DUT current), errors are created. An error occurs in the current measurement when adjusting the voltage to properly record a low resistance DUT, and an error occurs in the voltage measurement when adjusting the current measurement to correctly record a high resistance.
As requirements for measurement accuracy increase, a method of providing open/short corrections without causing shifts in voltage and current calibrations is needed. A new correction technique is needed that will allow open/short corrections without changing the voltage and current calibration.
Therefore, in general, a need exits in the art of TLP systems and devices for testing the ESD protection structures for integrated circuits to improve measurement accuracies by making measurement corrections that do not introduce calibration errors.